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Synplicity Enhances Its Certify Software to Improve Prototyping and Facilitate Team Design
SANTA CLARA, Calif.--(BUSINESS WIRE)--Jan. 29, 2001--Synplicity,
Inc. (Nasdaq: SYNP), a leading supplier of software for the design and
verification of semiconductors for Internet infrastructure, today
announced it has enhanced its Certify(TM) ASIC RTL (register transfer
level) prototyping software to simplify team design of prototypes for
verification of large, complex ASICs. New features, including
hierarchical board support and a Hierarchical Board Wizard, allow
members of a design team to simultaneously work on separate portions
of a design spanning multiple boards, while maintaining the integrity
of the design. Additionally, the Certify ASIC RTL prototyping software
has been enhanced to include support for third-party FPGA debug
products such as Xilinx ChipScope and mixed Verilog and VHDL designs,
facilitating the rapid design of complex systems-on-a-chip (SoCs).
With these enhancements, the Synplicity® Certify software can reduce
prototype development time by a significant amount.
``With ASIC densities sky-rocketing into the multiple million-gate
range, prototypes of these ASICs have become increasingly complex --
sometimes requiring three or more boards including FPGAs, processors
and other intellectual property,'' said Andy Haines, vice president of
marketing for Synplicity. ``We have designed the enhanced features in
the Certify tool to speed prototype development and enable teams to
quickly verify ASIC functionality and enable hardware and software
verification.''
Hierarchical Board Support & Board Wizard
The new Certify software offers hierarchical board support,
providing designers with the freedom to divide an ASIC design across
multiple boards before a commitment to partitioning is made, with no
concern for physical barriers. This capability encourages
collaborative design by enabling members of a design team to
simultaneously work on separate boards. Using the Certify product,
designers can partition the design at the register transfer level
(RTL), convert ASIC design styles for FPGA implementation and insert
debug access, potentially saving a significant amount of time over
traditional manual methods, which require gate-level partitioning of
each individual FPGA and board after RTL synthesis.
In version 3.1, the Certify software also includes a new
Hierarchical Board Wizard to graphically guide designers through each
step of the multiple-board prototype development process. The software
leads designers through the creation of each custom prototype board,
enabling them to partition out parts and connections. For complex
hierarchical designs, the user can push through the top level to
conduct partitioning at each level graphically to ease the process and
save development time.
Additional Enhancements Addressing Complex SoCs
Supporting the growing complexities of SoC designs, additional
enhancements to the Certify ASIC RTL prototyping software include
integration with third-party FPGA debug tools such as Xilinx
ChipScope, enabling designers to easily insert elements which allow
access to internal signals in the FPGAs during the hardware debug
phase.
The new Certify release offers mixed-language support, giving
designers the ability to mix Verilog and VHDL modules within a
prototype. Traditionally, a designer would have to individually
implement any IP module written in a language other than the primary
language of the design. This new capability is especially valuable for
designers of complex SoC designs where time-to-market requirements are
tight and the use of IP to shorten design time is a necessity. In
addition, this mixed-language support benefits a team of designers by
allowing individual designers to work on portions of the design in
their language of choice.
Pricing and Availability
The Certify 3.1 software is available now for $115,000 for Windows
NT, Windows 2000 and UNIX (Solaris & HP) operating systems. Current
Certify customers on maintenance will be upgraded at no additional
cost.
About the Certify Software
Leveraging Synplicity's core synthesis and partitioning
technologies, the Certify product is designed to enable designers to
create functional hardware prototypes of their design prior to ASIC
synthesis. This approach enables higher performance and productivity
than gate-level partitioning approaches, which require multiple
iterations to achieve a suitable partitioning of the devices. It also
enables faster time-to-market, especially for the
one-million-gate-plus ASIC/SoC designs used for multimedia and
communications applications. Synplicity believes that prototypes
defined by the Certify product will enable extensive verification
allowing ASIC designers to perform the following tasks at- or
near-system speed: hardware/software co-verification; algorithm
development and verification; verification of intellectual property,
either cores or library elements; system software development and
debugging, verification of system-level protocol compatibility and
early system/product development with FPGAs. EDN Magazine selected the
Certify product as one of the Hot 100 Products of 2000. EDN Magazine
editors reviewed thousands of products in dozens of categories before
identifying the products chosen for the Hot 100 list.
About Synplicity
Synplicity, Inc. (Nasdaq: SYNP) is a leading provider of software
products that enable the rapid and effective design and verification
of semiconductors used in Internet infrastructure hardware and other
electronic devices. The company leverages its innovative logic
synthesis, physical synthesis and verification software solutions to
improve performance and shorten development time for complex
programmable logic devices, application specific integrated circuits
(ASICs) and system-on-chip (SoC) integrated circuits. Synplicity's
fast, easy-to-use, affordable products offer extremely high quality of
results, support industry-standard design languages (VHDL and Verilog)
and run on popular platforms (Windows 98/2000, Windows NT and UNIX).
The company is located at 935 Stewart Drive, Sunnyvale, Calif. 94085.
Telephone: 408/215-6000; Fax: 408/990-0290; E-Mail:
info@synplicity.com.
The specific features, functionality and release timing of any new
products or new versions of current products remains at the sole
discretion of Synplicity, Inc., and no warranty is made as to when or
if specific features, functionality or releases may occur.
Synplicity is a registered trademark and Certify is a trademark of
Synplicity, Inc. All other brands or products are the trademarks or
registered trademarks of their owners.
Contact:
Tsantes & Associates
Steve Gabriel, 408/369-1500
steve@tsantes.com
or
Synplicity Inc.
Brian Caslis, 408/215-6000
caslis@synplicity.com
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